Publication
A Compact and Scalable RNS Architecture
| dc.contributor.author | Miguens Matutino, Pedro | |
| dc.contributor.author | Chaves, Ricardo | |
| dc.contributor.author | Sousa, Leonel | |
| dc.date.accessioned | 2014-09-16T20:00:18Z | |
| dc.date.available | 2014-09-16T20:00:18Z | |
| dc.date.issued | 2013 | |
| dc.description | Conferência: IEEE 24th International Conference on Application-Specific Systems, Architectures and Processors (ASAP)- Jun 05-07, 2013 | por |
| dc.description.abstract | This paper proposes a unified architecture for designing Residue Number System (RNS) based processors for moduli sets with an arbitrary number of channels. Recently, new RNS moduli sets have been proposed in order to increase the dynamic range and reduce the width of the channels. The proposed architecture allows designing forward and reverse RNS converters, as well as the arithmetic operators of each modulo channel. The forward and reverse conversions are implemented using channel arithmetic units, resulting in a very compact architecture. Moreover, the arithmetic operations supported at the channel level include addition, subtraction, and multiplication with accumulation capability. The presented results suggest that the proposed RNS architecture leads to compact and scalable implementations, with competitive, or even better, performance when compared with the related state of the art, considering fixed moduli sets. Experimental results suggest gains of 17% in the delay of arithmetic operations, with an area reduction of 23% regarding the state of the art. | por |
| dc.description.sponsorship | IEEE; IEEE Comp Soc | por |
| dc.identifier.citation | MATUTINO, Pedro Miguens; CAHVES, Ricardo; SOUSA, Leonel - A Compact and Scalable RNS Architecture. Proceedings of EEE 24th International Conference on Application-Specific Systems, Architectures and Processors (ASAP), (2013), p. 125-132. | por |
| dc.identifier.isbn | 978-1-4799-0494-5 | |
| dc.identifier.isbn | 978-1-4799-0493-8 | |
| dc.identifier.issn | 2160-0511 | |
| dc.identifier.uri | http://hdl.handle.net/10400.21/3813 | |
| dc.language.iso | eng | por |
| dc.peerreviewed | yes | por |
| dc.publisher | IEEE | por |
| dc.relation.ispartofseries | Proceedings IEEE International Conference of Application-Specific Systems Architectures and Processors; | |
| dc.relation.publisherversion | http://ieeexplore.ieee.org/xpl/articleDetails.jsp?tp=&arnumber=6567565&queryText%3DA+Compact+and+Scalable+RNS+Architecture | por |
| dc.subject | Residue | por |
| dc.subject | 2(N)+1 | por |
| dc.subject | Implementation | por |
| dc.subject | Converters | por |
| dc.subject | Moduli | por |
| dc.subject | Design | por |
| dc.title | A Compact and Scalable RNS Architecture | por |
| dc.type | conference object | |
| dspace.entity.type | Publication | |
| oaire.citation.conferencePlace | Washington | por |
| oaire.citation.endPage | 132 | por |
| oaire.citation.startPage | 125 | por |
| oaire.citation.title | IEEE 24th International Conference on Application-Specific Systems, Architectures and Processors (ASAP), 2013 | por |
| person.familyName | Miguens Matutino | |
| person.givenName | Pedro | |
| person.identifier.ciencia-id | 851D-A88F-2F71 | |
| person.identifier.orcid | 0000-0001-6518-1306 | |
| rcaap.rights | restrictedAccess | por |
| rcaap.type | conferenceObject | por |
| relation.isAuthorOfPublication | 1abd6a84-cbbd-44b0-8652-43170ce1cc0d | |
| relation.isAuthorOfPublication.latestForDiscovery | 1abd6a84-cbbd-44b0-8652-43170ce1cc0d |
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