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A flash ADC tolerant to high offset voltage comparators

dc.contributor.authorCouto-Pinto, Antonio
dc.contributor.authorFernandes, Jorge
dc.contributor.authorPiedade, Moises
dc.contributor.authorSilva, Manuel M.
dc.date.accessioned2017-05-17T10:48:09Z
dc.date.available2017-05-17T10:48:09Z
dc.date.issued2017-03
dc.description.abstractA conventional flash analog-to-digital converter (ADC) with a Wallace tree encoder ensures monotonicity and avoids missing codes, but still requires comparators with low offset voltage, which implies high area and power consumption. In this paper, we extend the purpose of this flash implementation, to allow the comparators to have extremely high offset voltages. This leads to a new approach toward the design of a flash ADC that does not require any type of calibration, allow easy porting among technologies and benefits from scaling. A statistical study is presented to demonstrate the effectiveness of the new method, and a modification is proposed to ensure full-range operation. It is shown that a proposed N-bit ADC has a performance equivalent to an (N−m)(N−m)-bit conventional flash ADC, with considerable gains in area and power consumption, with less design effort. The design flow of the OST ADC, with the necessary steps, is presented. A circuit, employing minimum dimension transistors, was fabricated in 0.13-μmμm CMOS and used as a proof of concept for the ADCs proposed here.pt_PT
dc.description.sponsorshipPEst-OE/EEI/LA0021/2013
dc.description.sponsorshipEXCL/EEI-ELC/0261/2012
dc.description.versioninfo:eu-repo/semantics/publishedVersionpt_PT
dc.identifier.citationCOUTO-PINTO, António; FERNANDES, Jorge R.; PIEDADE, Moisés; SILVA, Manuel M. - A flash ADC tolerant to high offset voltage comparators. Circuits Systems and Signal Processing. ISSN 0278-081X. Vol. 36, N. º 3 (2017), pp. 1150–1168pt_PT
dc.identifier.doi10.1007/s00034-016-0350-3pt_PT
dc.identifier.issn0278-081X
dc.identifier.issn1531-5878
dc.identifier.urihttp://hdl.handle.net/10400.21/7017
dc.language.isoengpt_PT
dc.peerreviewedyespt_PT
dc.publisherSpringer Verlagpt_PT
dc.relation.publisherversionhttp://download.springer.com/static/pdf/575/art%253A10.1007%252Fs00034-016-0350-3.pdf?originUrl=http%3A%2F%2Flink.springer.com%2Farticle%2F10.1007%2Fs00034-016-0350-3&token2=exp=1495016452~acl=%2Fstatic%2Fpdf%2F575%2Fart%25253A10.1007%25252Fs00034-016-0350-3.pdf%3ForiginUrl%3Dhttp%253A%252F%252Flink.springer.com%252Farticle%252F10.1007%252Fs00034-016-0350-3*~hmac=5f93728c439a00a1ea873c5aded21762000592c5d27d0b991003af6b130a0df2pt_PT
dc.subjectAnalog–digital conversionpt_PT
dc.subjectFlash ADCpt_PT
dc.subjectWallace treept_PT
dc.subjectStochastic errorspt_PT
dc.subjectOffset voltagept_PT
dc.titleA flash ADC tolerant to high offset voltage comparatorspt_PT
dc.typejournal article
dspace.entity.typePublication
oaire.citation.endPage1168pt_PT
oaire.citation.issue3pt_PT
oaire.citation.startPage1150pt_PT
oaire.citation.titleCircuits, Systems, and Signal Processingpt_PT
oaire.citation.volume36pt_PT
person.familyNameCouto-Pinto
person.familyNameFernandes
person.familyNamePiedade
person.givenNameAntonio
person.givenNameJorge
person.givenNameMoises
person.identifier.ciencia-id7B11-730C-9404
person.identifier.ciencia-idB11F-551B-0239
person.identifier.ciencia-id8C14-0687-F0DC
person.identifier.orcid0000-0001-8697-7100
person.identifier.orcid0000-0002-4916-5637
person.identifier.orcid0000-0002-1148-6590
person.identifier.scopus-author-id35569928800
person.identifier.scopus-author-id7004139929
rcaap.rightsclosedAccesspt_PT
rcaap.typearticlept_PT
relation.isAuthorOfPublicationf9cd48b1-c74c-4544-9c1d-d9525ca33fce
relation.isAuthorOfPublication6d918b1c-f6e2-4bb1-839b-3d32b0d4bfb4
relation.isAuthorOfPublicationb3d3e550-8e08-4762-84ca-3cae2e0b5de2
relation.isAuthorOfPublication.latestForDiscoveryb3d3e550-8e08-4762-84ca-3cae2e0b5de2

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