Publication
FPGA implementation of IEEE 802.15.3C receiver
dc.contributor.author | Véstias, Mário | |
dc.contributor.author | Sarmento, Helena | |
dc.date.accessioned | 2015-09-07T13:42:44Z | |
dc.date.available | 2015-09-07T13:42:44Z | |
dc.date.issued | 2012 | |
dc.description.abstract | This paper presents the implementation of the OFDM demodulator and the Viterbi decoder, proposed as part of a wireless High Definition video receiver to be integrated in an FPGA. These blocks were implemented in a Xilinx Virtex-6 FPGA. The complete system was previously modeled and simulated using MATLAB/Simulink to extract importante hardware characteristics for the FPGA implementation. | por |
dc.identifier.citation | VÉSTIAS, Mário Pereira; SARMENTO, Helena – FPGA implementation of IEEE 802.15.3C receiver. In IEEE 16Th International Symposium on Consumer Electronics (ISCE). IEEE, 2012. ISBN: 978-1-4673-1356-8 | por |
dc.identifier.isbn | 978-1-4673-1356-8 | |
dc.identifier.uri | http://hdl.handle.net/10400.21/5083 | |
dc.language.iso | eng | por |
dc.peerreviewed | yes | por |
dc.publisher | IEEE | por |
dc.title | FPGA implementation of IEEE 802.15.3C receiver | por |
dc.type | conference object | |
dspace.entity.type | Publication | |
oaire.citation.title | Book Series: IEEE International Symposium on Consumer Electronics | por |
person.familyName | Véstias | |
person.givenName | Mário | |
person.identifier.ciencia-id | 4717-C2C7-3F2C | |
person.identifier.orcid | 0000-0001-8556-4507 | |
person.identifier.rid | H-9953-2012 | |
person.identifier.scopus-author-id | 14525867300 | |
rcaap.rights | closedAccess | por |
rcaap.type | conferenceObject | por |
relation.isAuthorOfPublication | a7d22b29-c961-45ac-bc09-cd5e1002f1e8 | |
relation.isAuthorOfPublication.latestForDiscovery | a7d22b29-c961-45ac-bc09-cd5e1002f1e8 |
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