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A fast and scalable architecture to run convolutional neural networks in low density FPGAs

2020-09Journal article Restricted access
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dc.contributor.authorVéstias, Mário
dc.contributor.authorDuarte, Rui
dc.contributor.authorDe Sousa, Jose
dc.contributor.authorNeto, Horácio C
dc.date.accessioned2020-10-07T14:07:34Z
dc.date.available2020-10-07T14:07:34Z
dc.date.issued2020-09
dc.descriptionEste trabalho foi financiado pelo Concurso Anual para Projetos de Investigação, Desenvolvimento, Inovação e Criação Artística (IDI&CA) 2016 do Instituto Politécnico de Lisboa. Código de referência IPL/2019/inCNeuraINet_ISEL
dc.description.abstractDeep learning and, in particular, convolutional neural networks (CNN) achieve very good results on several computer vision applications like security and surveillance, where image and video analysis are required. These networks are quite demanding in terms of computation and memory and therefore are usually implemented in high-performance computing platforms or devices. Running CNNs in embedded platforms or devices with low computational and memory resources requires a careful optimization of system architectures and algorithms to obtain very efficient designs. In this context, Field Programmable Gate Arrays (FPGA) can achieve this efficiency since the programmable hardware fabric can be tailored for each specific network. In this paper, a very efficient configurable architecture for CNN inference targeting any density FPGAs is described. The architecture considers fixed-point arithmetic and image batch to reduce computational, memory and memory bandwidth requirements without compromising network accuracy. The developed architecture supports the execution of large CNNs in any FPGA devices including those with small on-chip memory size and logic resources. With the proposed architecture, it is possible to infer an image in AlexNet in 4.3 ms in a ZYNQ7020 and 1.2 ms in a ZYNQ7045.pt_PT
dc.description.versioninfo:eu-repo/semantics/publishedVersionpt_PT
dc.identifier.citationVÉSTIAS, Mário P.; [et al] – A fast and scalable architecture to run convolutional neural networks in low density FPGAs. Microprocessors and Microsystems. ISSN 0141-9331. Vol. 77 (2020), pp. 1-15pt_PT
dc.identifier.doi10.1016/j.micpro.2020.103136pt_PT
dc.identifier.issn0141-9331
dc.identifier.issn1872-9436
dc.identifier.urihttp://hdl.handle.net/10400.21/12279
dc.language.isoengpt_PT
dc.peerreviewedyespt_PT
dc.publisherElsevierpt_PT
dc.relationUIDB/50021/2020 - FCTpt_PT
dc.relationProjeto financiado no âmbito do Concurso de Projetos de Investigação, Desenvolvimento, Inovação & Criação Artística (IDI&CA) financiados pelo Instituto Politécnico de Lisboa. IPL/2019/inCNeuraINet_ISELpt_PT
dc.relation.publisherversionhttps://reader.elsevier.com/reader/sd/pii/S0141933120303033?token=821C852A1AB13FF96ECA6B4531A124327F0F14D1EB866EF350ABCB5A285058BAA68C567F5664B9A0703FA02D2A8374F7pt_PT
dc.subjectDeep learningpt_PT
dc.subjectConvolutional neural networkpt_PT
dc.subjectSmart edge devicespt_PT
dc.subjectFPGApt_PT
dc.titleA fast and scalable architecture to run convolutional neural networks in low density FPGAspt_PT
dc.typejournal article
dspace.entity.typePublication
oaire.citation.endPage15pt_PT
oaire.citation.startPage1pt_PT
oaire.citation.titleMicroprocessors and Microsystemspt_PT
oaire.citation.volume77pt_PT
person.familyNameVéstias
person.familyNameDuarte
person.familyNamede Sousa
person.familyNameCláudio de Campos Neto
person.givenNameMário
person.givenNameRui
person.givenNameJose
person.givenNameHorácio
person.identifier.ciencia-id4717-C2C7-3F2C
person.identifier.ciencia-idB91E-770F-19A3
person.identifier.ciencia-idBE18-E262-E0EC
person.identifier.ciencia-id9915-3BDF-5C35
person.identifier.orcid0000-0001-8556-4507
person.identifier.orcid0000-0002-7060-4745
person.identifier.orcid0000-0001-7525-7546
person.identifier.orcid0000-0002-3621-8322
person.identifier.ridH-9953-2012
person.identifier.ridI-4402-2015
person.identifier.ridL-6859-2015
person.identifier.scopus-author-id14525867300
person.identifier.scopus-author-id24823991600
person.identifier.scopus-author-id7102813024
rcaap.rightsclosedAccesspt_PT
rcaap.typearticlept_PT
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relation.isAuthorOfPublication38334d5e-83e8-494c-a9e0-396299376d97
relation.isAuthorOfPublication.latestForDiscovery38334d5e-83e8-494c-a9e0-396299376d97

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