Repository logo
 
Publication

System-on-chip field-programmable gate array design for onboard real-time hyperspectral unmixing

2016Journal article Restricted access
Simple item page
dc.contributor.authorNascimento, Jose
dc.contributor.authorVéstias, Mário
dc.date.accessioned2016-05-02T09:52:09Z
dc.date.available2016-05-02T09:52:09Z
dc.date.issued2016
dc.description.abstractHyperspectral instruments have been incorporated in satellite missions, providing large amounts of data of high spectral resolution of the Earth surface. This data can be used in remote sensing applications that often require a real-time or near-real-time response. To avoid delays between hyperspectral image acquisition and its interpretation, the last usually done on a ground station, onboard systems have emerged to process data, reducing the volume of information to transfer from the satellite to the ground station. For this purpose, compact reconfigurable hardware modules, such as field-programmable gate arrays (FPGAs), are widely used. This paper proposes an FPGA-based architecture for hyperspectral unmixing. This method based on the vertex component analysis (VCA) and it works without a dimensionality reduction preprocessing step. The architecture has been designed for a low-cost Xilinx Zynq board with a Zynq-7020 system-on-chip FPGA-based on the Artix-7 FPGA programmable logic and tested using real hyperspectral data. Experimental results indicate that the proposed implementation can achieve real-time processing, while maintaining the methods accuracy, which indicate the potential of the proposed platform to implement high-performance, low-cost embedded systems, opening perspectives for onboard hyperspectral image processing.pt_PT
dc.identifier.citationNASCIMENTO, José M. P.; VÉSTIAS, Mário Pereira - System-on-chip field-programmable gate array design for onboard real-time hyperspectral unmixing. Journal of Applied Remote Sensing. Vol. 10 (2016), pp. 015004-1-015004-17pt_PT
dc.identifier.doi10.1117/1.JRS.10.015004pt_PT
dc.identifier.issn1931-3195
dc.identifier.urihttp://hdl.handle.net/10400.21/6133
dc.language.isoengpt_PT
dc.peerreviewedyespt_PT
dc.publisherSPIEpt_PT
dc.subjectHyperspectral unmixingpt_PT
dc.subjectVertex component analysispt_PT
dc.subjectField-programmable gate arrayspt_PT
dc.subjectOnboard processingpt_PT
dc.subjectReal timept_PT
dc.titleSystem-on-chip field-programmable gate array design for onboard real-time hyperspectral unmixingpt_PT
dc.typejournal article
dspace.entity.typePublication
oaire.citation.endPage015004-17pt_PT
oaire.citation.startPage015004-1pt_PT
oaire.citation.titleJournal of Applied Remote Sensingpt_PT
oaire.citation.volume10pt_PT
person.familyNameNascimento
person.familyNameVéstias
person.givenNameJose
person.givenNameMário
person.identifier.ciencia-id6912-6F61-1964
person.identifier.ciencia-id4717-C2C7-3F2C
person.identifier.orcid0000-0002-5291-6147
person.identifier.orcid0000-0001-8556-4507
person.identifier.ridE-6212-2015
person.identifier.ridH-9953-2012
person.identifier.scopus-author-id55920018000
person.identifier.scopus-author-id14525867300
rcaap.rightsclosedAccesspt_PT
rcaap.typearticlept_PT
relation.isAuthorOfPublicationc7ffc6c0-1bdc-4f47-962a-a90dfb03073c
relation.isAuthorOfPublicationa7d22b29-c961-45ac-bc09-cd5e1002f1e8
relation.isAuthorOfPublication.latestForDiscoverya7d22b29-c961-45ac-bc09-cd5e1002f1e8

Files

Original bundle
Now showing 1 - 1 of 1
No Thumbnail Available
Name:
System-on-chip field-programmable gate array design for onboard real-time hyperspectral unmixing.pdf
Size:
1012.89 KB
Format:
Adobe Portable Document Format
Download
License bundle
Now showing 1 - 1 of 1
No Thumbnail Available
Name:
license.txt
Size:
1.71 KB
Format:
Item-specific license agreed upon to submission
Description:
Download

Collections

ISEL - Eng. Elect. Tel. Comp. - Comunicações