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- FPGA-based architecture for hyperspectral unmixingPublication . Nascimento, Jose; Véstias, Mário; Martin, GabrielThis paper proposes an FPGA-based architecture for onboard hyperspectral unmixing. This method based on the Vertex Component Analysis (VCA) has several advantages, namely it is unsupervised, fully automatic, and it works without dimensionality reduction (DR) pre-processing step. The architecture has been designed for a low cost Xilinx Zynq board with a Zynq-7020 SoC FPGA based on the Artix-7 FPGA programmable logic and tested using real hyperspectral datasets. Experimental results indicate that the proposed implementation can achieve real-time processing, while maintaining the methods accuracy, which indicate the potential of the proposed platform to implement high-performance, low cost embedded systems.
- A fast parallel hyperspectral coded aperture algorithm for compressive sensing using OpenCLPublication . Bernabé, Sergio; Martin, Gabriel; Nascimento, Jose; Bioucas-Dias, José M.; Plaza, Antonio; Botella, Guillermo; Prieto-Matias, ManuelIn this paper, we develop a fast implementation of an hyperspectral coded aperture (HYCA) algorithm on different platforms using OpenCL, an open standard for parallel programing on heterogeneous systems, which includes a wide variety of devices, from dense multicore systems from major manufactures such as Intel or ARM to new accelerators such as graphics processing units (GPUs), field programmable gate arrays (FPGAs), the Intel Xeon Phi and other custom devices. Our proposed implementation of HYCA significantly reduces its computational cost. Our experiments have been conducted using simulated data and reveal considerable acceleration factors. This kind of implementations with the same descriptive language on different architectures are very important in order to really calibrate the possibility of using heterogeneous platforms for efficient hyperspectral imaging processing in real remote sensing missions.
- GPU implementation of a hyperspectral coded aperture algorithm for compressive sensingPublication . Bernabe, Sergio; Martin, Gabriel; Nascimento, Jose; Bioucas-Dias, José; Plaza, Antonio; Silva, VítorThis paper presents a new parallel implementation of a previously hyperspectral coded aperture (HYCA) algorithm for compressive sensing on graphics processing units (GPUs). HYCA method combines the ideas of spectral unmixing and compressive sensing exploiting the high spatial correlation that can be observed in the data and the generally low number of endmembers needed in order to explain the data. The proposed implementation exploits the GPU architecture at low level, thus taking full advantage of the computational power of GPUs using shared memory and coalesced accesses to memory. The proposed algorithm is evaluated not only in terms of reconstruction error but also in terms of computational performance using two different GPU architectures by NVIDIA: GeForce GTX 590 and GeForce GTX TITAN. Experimental results using real data reveals signficant speedups up with regards to serial implementation.
- GPU implementation of a constrained hyperspectral coded aperture algorithm for compressive sensingPublication . Bernabé, Sérgio; Martin, Gabriel; Nascimento, Jose; Bioucas-Dias, José M.; Plaza, Antonio; Silva, VítorIn this paper, a parallel implementation of a previously constrained hyperspectral coded aperture (CHYCA) algorithm for compressive sensing on graphics processing units (GPUs) is proposed. CHYCA method combines the ideas of spectral unmixing and compressive sensing exploiting the high spatial correlation that can be observed in the data and the generally low number of endmembers needed in order to explain the data. The performance of CHYCA relies which does not depend on the tuning of a regularization parameter, which is a time consuming task offering good performance compared with a previously hyperspectral coded aperture (HYCA) method. The proposed implementation exploits the GPU architecture at low level, thus taking full advantage of the computational power of GPUs using shared memory and coalesced accesses to memory. Experimental results using simulated data reveals speedups up to 56 times, with regards to serial implementation.