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Hardware/software co-design of H.264/AVC encoders for multi-core embedded systems

dc.contributor.authorDias, Tiago
dc.contributor.authorRoma, Nuno
dc.contributor.authorSousa, Leonel
dc.date.accessioned2020-10-27T15:36:28Z
dc.date.available2020-10-27T15:36:28Z
dc.date.issued2011-01-31
dc.description.abstractThis paper presents a multi-core H.264/AVC encoder suitable for implementations in small and medium complexity embedded systems. The proposed structure results from an efficient hardware/software co-design methodology, where the encoder software application is highly optimized and structured in a very modular and efficient manner, so as to allow its most complex and time consuming operations to be offloaded to dedicated hardware accelerators. The considered methodology adopts a simple and efficient core interconnection mechanism to easily allow the inclusion and the removal of such optimized processing cores. Experimental results obtained with the implementation in a Virtex4 FPGA of an H.264/AVC encoder using an ASIP IP core as a ME hardware accelerator have proven the advantages of this methodology. For the considered system, speedup factors greater than 15 were obtained with a very modest increase of the involved hardware resources.pt_PT
dc.description.versioninfo:eu-repo/semantics/publishedVersionpt_PT
dc.identifier.citationDIAS, Tiago; ROMA, Nuno; SOUSA, Leonel – Hardware/software co-design of H.264/AVC encoders for multi-core embedded systems. In 2010 Conference on Design and Architectures for Signal and Image Processing (DASIP). Edinburgh, UK: IEEE, 2010. ISBN 978-1-4244-8735-6. Pp. 242-249pt_PT
dc.identifier.doi10.1109/DASIP.2010.5706271pt_PT
dc.identifier.isbn978-1-4244-8735-6
dc.identifier.isbn978-1-4244-8734-9
dc.identifier.isbn978-1-4244-8733-2
dc.identifier.urihttp://hdl.handle.net/10400.21/12300
dc.language.isoengpt_PT
dc.publisherIEEEpt_PT
dc.relation.publisherversionhttps://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=5706271pt_PT
dc.subjectHardware/software co-designpt_PT
dc.subjectMulticorept_PT
dc.subjectEmbedded systemspt_PT
dc.subjectVideo codingpt_PT
dc.subjectH.264/AVCpt_PT
dc.titleHardware/software co-design of H.264/AVC encoders for multi-core embedded systemspt_PT
dc.typeconference object
dspace.entity.typePublication
oaire.citation.conferencePlace26-28 Oct. 2010 - Edinburgh, UKpt_PT
oaire.citation.endPage249pt_PT
oaire.citation.startPage242pt_PT
oaire.citation.title2010 Conference on Design and Architectures for Signal and Image Processing (DASIP)pt_PT
person.familyNameBraga da Silva Dias
person.familyNameRoma
person.familyNameSousa
person.givenNameTiago Miguel
person.givenNameNuno
person.givenNameLeonel
person.identifier709056
person.identifier.ciencia-idE21C-1E42-EE73
person.identifier.ciencia-idCB11-EDBA-7BA5
person.identifier.orcid0000-0001-7445-5823
person.identifier.orcid0000-0003-2491-4977
person.identifier.orcid0000-0002-8066-221X
person.identifier.ridH-4265-2011
person.identifier.ridB-2749-2009
person.identifier.scopus-author-id11540058800
person.identifier.scopus-author-id7004775548
rcaap.rightsopenAccesspt_PT
rcaap.typeconferenceObjectpt_PT
relation.isAuthorOfPublication1c03cd27-cf61-43fb-803c-19885a82d62a
relation.isAuthorOfPublication8bf85aaa-28df-4d94-95c8-353bd018af9c
relation.isAuthorOfPublication07c59d8c-0469-4df6-b96f-60ac362d7712
relation.isAuthorOfPublication.latestForDiscovery8bf85aaa-28df-4d94-95c8-353bd018af9c

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