Publication
Hardware/software co-design of H.264/AVC encoders for multi-core embedded systems
dc.contributor.author | Dias, Tiago | |
dc.contributor.author | Roma, Nuno | |
dc.contributor.author | Sousa, Leonel | |
dc.date.accessioned | 2020-10-27T15:36:28Z | |
dc.date.available | 2020-10-27T15:36:28Z | |
dc.date.issued | 2011-01-31 | |
dc.description.abstract | This paper presents a multi-core H.264/AVC encoder suitable for implementations in small and medium complexity embedded systems. The proposed structure results from an efficient hardware/software co-design methodology, where the encoder software application is highly optimized and structured in a very modular and efficient manner, so as to allow its most complex and time consuming operations to be offloaded to dedicated hardware accelerators. The considered methodology adopts a simple and efficient core interconnection mechanism to easily allow the inclusion and the removal of such optimized processing cores. Experimental results obtained with the implementation in a Virtex4 FPGA of an H.264/AVC encoder using an ASIP IP core as a ME hardware accelerator have proven the advantages of this methodology. For the considered system, speedup factors greater than 15 were obtained with a very modest increase of the involved hardware resources. | pt_PT |
dc.description.version | info:eu-repo/semantics/publishedVersion | pt_PT |
dc.identifier.citation | DIAS, Tiago; ROMA, Nuno; SOUSA, Leonel – Hardware/software co-design of H.264/AVC encoders for multi-core embedded systems. In 2010 Conference on Design and Architectures for Signal and Image Processing (DASIP). Edinburgh, UK: IEEE, 2010. ISBN 978-1-4244-8735-6. Pp. 242-249 | pt_PT |
dc.identifier.doi | 10.1109/DASIP.2010.5706271 | pt_PT |
dc.identifier.isbn | 978-1-4244-8735-6 | |
dc.identifier.isbn | 978-1-4244-8734-9 | |
dc.identifier.isbn | 978-1-4244-8733-2 | |
dc.identifier.uri | http://hdl.handle.net/10400.21/12300 | |
dc.language.iso | eng | pt_PT |
dc.publisher | IEEE | pt_PT |
dc.relation.publisherversion | https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=5706271 | pt_PT |
dc.subject | Hardware/software co-design | pt_PT |
dc.subject | Multicore | pt_PT |
dc.subject | Embedded systems | pt_PT |
dc.subject | Video coding | pt_PT |
dc.subject | H.264/AVC | pt_PT |
dc.title | Hardware/software co-design of H.264/AVC encoders for multi-core embedded systems | pt_PT |
dc.type | conference object | |
dspace.entity.type | Publication | |
oaire.citation.conferencePlace | 26-28 Oct. 2010 - Edinburgh, UK | pt_PT |
oaire.citation.endPage | 249 | pt_PT |
oaire.citation.startPage | 242 | pt_PT |
oaire.citation.title | 2010 Conference on Design and Architectures for Signal and Image Processing (DASIP) | pt_PT |
person.familyName | Braga da Silva Dias | |
person.familyName | Roma | |
person.familyName | Sousa | |
person.givenName | Tiago Miguel | |
person.givenName | Nuno | |
person.givenName | Leonel | |
person.identifier | 709056 | |
person.identifier.ciencia-id | E21C-1E42-EE73 | |
person.identifier.ciencia-id | CB11-EDBA-7BA5 | |
person.identifier.orcid | 0000-0001-7445-5823 | |
person.identifier.orcid | 0000-0003-2491-4977 | |
person.identifier.orcid | 0000-0002-8066-221X | |
person.identifier.rid | H-4265-2011 | |
person.identifier.rid | B-2749-2009 | |
person.identifier.scopus-author-id | 11540058800 | |
person.identifier.scopus-author-id | 7004775548 | |
rcaap.rights | openAccess | pt_PT |
rcaap.type | conferenceObject | pt_PT |
relation.isAuthorOfPublication | 1c03cd27-cf61-43fb-803c-19885a82d62a | |
relation.isAuthorOfPublication | 8bf85aaa-28df-4d94-95c8-353bd018af9c | |
relation.isAuthorOfPublication | 07c59d8c-0469-4df6-b96f-60ac362d7712 | |
relation.isAuthorOfPublication.latestForDiscovery | 8bf85aaa-28df-4d94-95c8-353bd018af9c |
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