Publication
Trends Of CPU, GPU and FPGA for high-performance computing
dc.contributor.author | Véstias, Mário | |
dc.contributor.author | Neto, Horácio | |
dc.date.accessioned | 2015-08-19T09:59:06Z | |
dc.date.available | 2015-08-19T09:59:06Z | |
dc.date.issued | 2014-10 | |
dc.description.abstract | Floating-point computing with more than one TFLOP of peak performance is already a reality in recent Field-Programmable Gate Arrays (FPGA). General-Purpose Graphics Processing Units (GPGPU) and recent many-core CPUs have also taken advantage of the recent technological innovations in integrated circuit (IC) design and had also dramatically improved their peak performances. In this paper, we compare the trends of these computing architectures for high-performance computing and survey these platforms in the execution of algorithms belonging to different scientific application domains. Trends in peak performance, power consumption and sustained performances, for particular applications, show that FPGAs are increasing the gap to GPUs and many-core CPUs moving them away from high-performance computing with intensive floating-point calculations. FPGAs become competitive for custom floating-point or fixed-point representations, for smaller input sizes of certain algorithms, for combinational logic problems and parallel map-reduce problems. © 2014 Technical University of Munich (TUM). | por |
dc.identifier.citation | VÉSTIAS, Mário Pereira – Trends of CPU, GPU and FPGA for high-performance computing. In Conference Digest - 24th International Conference on Field Programmable Logic and Applications, FPL 2014. New York : IEEE - Institute of Electrical and Electronics Engineers Inc., 2014. ISBN: 978-300044645-0. Art. Nr. 6927483 | |
dc.identifier.doi | 10.1109/FPL.2014.6927483 | |
dc.identifier.isbn | 978-300044645-0 | |
dc.identifier.uri | http://hdl.handle.net/10400.21/4840 | |
dc.language.iso | eng | en |
dc.peerreviewed | yes | por |
dc.publisher | IEEE - Institute of Electrical and Electronics Engineers Inc. | por |
dc.relation | PTDC/EEAELC/122098/2010 | |
dc.relation | Strategic Project - LA 21 - 2013-2014 | |
dc.relation.ispartofseries | 6927483 | |
dc.subject | High-Performance Computing | por |
dc.subject | Field-Programmable Gate Arrays (FPGA) | por |
dc.title | Trends Of CPU, GPU and FPGA for high-performance computing | por |
dc.type | conference object | |
dspace.entity.type | Publication | |
oaire.awardTitle | Strategic Project - LA 21 - 2013-2014 | |
oaire.awardURI | info:eu-repo/grantAgreement/FCT/6817 - DCRRNI ID/PEst-OE%2FEEI%2FLA0021%2F2013/PT | |
oaire.citation.conferencePlace | New York | por |
oaire.citation.title | Conference Digest - 24th International Conference on Field Programmable Logic and Applications, FPL | por |
oaire.fundingStream | 6817 - DCRRNI ID | |
person.familyName | Véstias | |
person.givenName | Mário | |
person.identifier.ciencia-id | 4717-C2C7-3F2C | |
person.identifier.orcid | 0000-0001-8556-4507 | |
person.identifier.rid | H-9953-2012 | |
person.identifier.scopus-author-id | 14525867300 | |
project.funder.identifier | http://doi.org/10.13039/501100001871 | |
project.funder.name | Fundação para a Ciência e a Tecnologia | |
rcaap.rights | closedAccess | por |
rcaap.type | conferenceObject | por |
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