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Abstract(s)
Hoje em dia a necessidade computacional cresce exponencialmente, requerendocom que os sistemas embebidos estejam em constante evolução de forma a apresentar novas soluções. Devido a limitações tecnológicas o uso de um core simples foi inevitavelmente ultrapassado pelas alternativas que optam por implementações multi-core. Apesar de plataformas como a Field-Programmable GateArray(FPGA) nos presentearem com grandes oportunidades, ainda se verifica aexistência de resoluções de algoritmos matemáticos ainda recorrerem a soluçãodedicadas com apenas um core.
Neste documento vai-se introduzir um sistema embebido com arquitecturamany-core para cálculo da Transformada discreta de cosseno bi-dimensional(2DDCT), como alternativa viável às implementações actuais.
No decorrer deste trabalho foi necessário desenvolver uma Network-On-aChip(NoC), que vai criar a infraestrutura de comunicação responsável por ligaros vários módulos dedicados. Ao analise a 2D-DCT foi possível implementar ummodulo suficientemente flexível que permita alcançar o paralelismo deste algoritmo. Cada core dedicado é capaz de calcular coeficientes individuais da DCT,fazendo com que a arquitectura many-core possa ser escalável com o objectivo deobter diferentes configurações, variando na performance e consumo de recursos.
Abstract: Nowadays the need for more computing capacity has increased exponentially, requiring embedded systems to evolve and find new solutions. Due to technologylimitation the single-core unavoidably was replaced by multi-core alternatives. Beside platforms like the Field-Programmable Gate Array(FPGA) provide great opportunities, it is often seen mathematical algorithms done by dedicated single-coresolutions. This thesis introduces an embedded many-core architecture responsiblefor a 2D Discrete Cosine Transform(2D-DCT) calculation, with the goal of givinga viable alternative to the current implementations. During this work it was necessary to develop a Network-on-a-chip, that creates the communication infrastructure responsible for connecting the dedicatedcores. By analysing the 2D-DCT it was possible to implement a module that isflexible enough to enable algorithm parallelism. Each dedicated core is capable ofcalculating individual DCT coefficients, meaning that many-core architecture canbe scaled in order to obtain different configurations, that vary in performance orresources consumption.
Abstract: Nowadays the need for more computing capacity has increased exponentially, requiring embedded systems to evolve and find new solutions. Due to technologylimitation the single-core unavoidably was replaced by multi-core alternatives. Beside platforms like the Field-Programmable Gate Array(FPGA) provide great opportunities, it is often seen mathematical algorithms done by dedicated single-coresolutions. This thesis introduces an embedded many-core architecture responsiblefor a 2D Discrete Cosine Transform(2D-DCT) calculation, with the goal of givinga viable alternative to the current implementations. During this work it was necessary to develop a Network-on-a-chip, that creates the communication infrastructure responsible for connecting the dedicatedcores. By analysing the 2D-DCT it was possible to implement a module that isflexible enough to enable algorithm parallelism. Each dedicated core is capable ofcalculating individual DCT coefficients, meaning that many-core architecture canbe scaled in order to obtain different configurations, that vary in performance orresources consumption.
Description
Trabalho Final de Mestrado para obtenção do grau de Mestre em Engenharia de Electrónica e Telecomunicações
Keywords
FPGA Arquitectura de computadores Multidimensional DCT Comunicação
Citation
MÁLIA, Wilson Alexandre Borges - Many-core approach to 2D-DCT calculation using an FPGA. Lisboa: Instituto Superior de Engenharia de Lisboa, 2014. Dissertação de mestrado.
Publisher
Instituto Superior de Engenharia de Lisboa