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High throughput and scalable architecture for unified transform coding in embedded H.264/AVC video coding systems

2011-10-17Conference object Open access
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dc.contributor.authorDias, Tiago
dc.contributor.authorLopez, Sebastian
dc.contributor.authorRoma, Nuno
dc.contributor.authorSousa, Leonel
dc.date.accessioned2020-10-27T11:46:38Z
dc.date.available2020-10-27T11:46:38Z
dc.date.issued2011-10-17
dc.description.abstractAn innovative high throughput and scalable multi-transform architecture for H.264/AVC is presented in this paper. This structure can be used as a hardware accelerator in modern embedded systems to efficiently compute the 4×4 forward/inverse integer DCT, as well as the 2-D 4×4 / 2×2 Hadamard transforms. Moreover, its highly flexible design and hardware efficiency allows it to be easily scaled in terms of performance and hardware cost to meet the specific requirements of any given video coding application. Experimental results obtained using a Xilinx Virtex-4 FPGA demonstrate the superior performance and hardware efficiency levels provided by the proposed structure, which presents a throughput per unit of area at least 1.8× higher than other similar recently published designs. Furthermore, such results also showed that this architecture can compute, in realtime, all the above mentioned H.264/AVC transforms for video sequences with resolutions up to UHDV.pt_PT
dc.description.versioninfo:eu-repo/semantics/publishedVersionpt_PT
dc.identifier.citationDIAS, Tiago; [et al] – High throughput and scalable architecture for unified transform coding in embedded H.264/AVC video coding systems. In 2011 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation. Samos, Greece: IEEE, 2011. ISBN 978-1-4577-0801-5. Pp. 225-232pt_PT
dc.identifier.doi10.1109/SAMOS.2011.6045465pt_PT
dc.identifier.isbn978-1-4577-0801-5
dc.identifier.isbn978-1-4577-0802-2
dc.identifier.urihttp://hdl.handle.net/10400.21/12297
dc.language.isoengpt_PT
dc.publisherIEEEpt_PT
dc.relation.publisherversionhttps://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=6045465pt_PT
dc.subjectVideo codingpt_PT
dc.subjectH.264/AVCpt_PT
dc.subjectUnified transform kernelpt_PT
dc.subjectScalable architecturept_PT
dc.subjectFPGApt_PT
dc.titleHigh throughput and scalable architecture for unified transform coding in embedded H.264/AVC video coding systemspt_PT
dc.typeconference object
dspace.entity.typePublication
oaire.citation.conferencePlace18-21 July 2011 - Samos, Greecept_PT
oaire.citation.endPage232pt_PT
oaire.citation.startPage225pt_PT
oaire.citation.title2011 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulationpt_PT
person.familyNameBraga da Silva Dias
person.familyNameRoma
person.familyNameSousa
person.givenNameTiago Miguel
person.givenNameNuno
person.givenNameLeonel
person.identifier709056
person.identifier.ciencia-idE21C-1E42-EE73
person.identifier.ciencia-idCB11-EDBA-7BA5
person.identifier.orcid0000-0001-7445-5823
person.identifier.orcid0000-0003-2491-4977
person.identifier.orcid0000-0002-8066-221X
person.identifier.ridH-4265-2011
person.identifier.ridB-2749-2009
person.identifier.scopus-author-id11540058800
person.identifier.scopus-author-id7004775548
rcaap.rightsclosedAccesspt_PT
rcaap.typeconferenceObjectpt_PT
relation.isAuthorOfPublication1c03cd27-cf61-43fb-803c-19885a82d62a
relation.isAuthorOfPublication8bf85aaa-28df-4d94-95c8-353bd018af9c
relation.isAuthorOfPublication07c59d8c-0469-4df6-b96f-60ac362d7712
relation.isAuthorOfPublication.latestForDiscovery1c03cd27-cf61-43fb-803c-19885a82d62a

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