Centre of Technology and Systems

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Grating coupler design for low-cost fabrication in amorphous silicon photonic integrated circuits

Publication . Almeida, Daniel; Lourenço, Paulo; Fantoni, Alessandro; Costa, João; Vieira, Manuela

Photonic circuits find applications in biomedicine, manufacturing, quantum computing and communications. Photonic waveguides are crucial components, typically having cross-section orders of magnitude inferior when compared with other photonic components (e.g., optical fibers, light sources and photodetectors). Several light-coupling methods exist, consisting of either on-plane (e.g., adiabatic and end-fire coupling) or off-plane methods (e.g., grating and vertical couplers). The grating coupler is a versatile light-transference technique which can be tested at wafer level, not requiring specific fiber terminations or additional optical components, like lenses, polarizers or prisms. This study focuses on fully-etched grating couplers without a bottom reflector, made from hydrogenated amorphous silicon (a-Si:H), deposited over a silica substrate. Different coupler designs were tested, and of these we highlight two: the superimposition of two lithographic masks with different periods and an offset between them to create a random distribution and a technique based on the quadratic refractive-index variation along the device’s length. Results were obtained by 2D-FDTD simulation. The designed grating couplers achieve coupling efficiencies for the TE-like mode over −8 dB (mask overlap) and −3 dB (quadratic variation), at a wavelength of 1550 nm. The coupling scheme considers a 220 nm a-Si:H waveguide and an SMF-28 optical fiber.

2024-08-23Journal article

Open access

Analog flat-level circuit synthesis with genetic algorithms

Publication . Gomes, Miguel; Tavares, Rui; Goes, João

This paper proposes new techniques for automatic simulation-based analog circuit synthesis using genetic algorithms. This is intended to contribute to the set of electronic design automation tools that use genetic algorithms in circuit synthesis, especially those that use the simulator-in-the-loop paradigm. In this study, a genetic algorithm was employed as the generation engine for analog circuits, and variable-length chromosomes were used to describe circuit topology. The entire process is carried out on a flat level (device level), i.e. using the transistor and other elementary devices (e.g. resistors) as the basic elementary blocks. Circuit synthesis is accomplished without any knowledge of previously defined topologies (or analog block cells). Three techniques are presented for analog circuit synthesis that are incorporated in the genetic algorithm, which contribute to its robustness, leading to better and faster results. These techniques can be summarized as follows: 1) adaptive probability of chromosome acceptance, 2) removal of redundant or useless components, and 3) segmented evolution. The automatic process starts with the circuit input and output specifications and proceeds with the evolution of both circuit topology and component sizing. The results shown in this paper include a 40 dB DC gain amplifier, which, when evaluated with SPECTRE/CADENCE 6.0, using a standard 130 nm technology, with a load capacitor of 10 pF, has a gain of 102 V/V, a GBW product of 70 MHz, and a figure of merit of 1436 MHz.pF/mW.

2024-08-19Journal article

Open access

Transformerless ultra-high gain buck-boost DC-DC converter with single-switch of reduced voltage stress

Publication . Cordeiro, Armando; Gamboa, Paulo; Luís, Ricardo; Fonte, Pedro M; Monteiro, Joaquim; Martins, João F.; Silva, J. Fernando; Foito, Daniel; Fernao Pires, Vitor

This paper introduces a new DC-DC power converter topology capable of both step-up and step-down voltage conversion, with an exceptionally high voltage gain ratio.. Besides the high extension of the voltage gain range, the converter is also characterized by the use of a single switch. Moreover, the stress imposed on the switch's voltage is minimized, enabling the utilization of low-voltage, low RDS-ON MOSFETs. Consequently, this modification leads to reduced costs and losses associated with switch conduction and turn ON. Another aspect concerning the proposed converter is that the input current exhibits a continuous behavior, which can be significant for various applications. The paper provides insights into the operational performance, steady state behavior, and mathematical underpinnings of the proposed dc-dc converter. Comparative evaluation of the static voltage gain of the proposed converter and other topologies with comparable characteristics will also be shown. Verification of the presented converter's key features are conducted through both simulation and experimental assessments using a 440-W laboratory prototype. Through these analyses, the efficacy and viability of the modified coupled-inductor SEPIC converter with enhanced voltage gain capability are confirmed.

2024-12-31Conference object

Open access