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| Issue Date | Title | Author(s) | Type | Access Type |
| Jan-2015 | Algorithm-oriented design of efficient many-core architectures applied to dense matrix multiplication | José, Wilson M.; Silva, Ana Rita; Véstias, Mário; Neto, Horácio | article |  |
| Nov-2017 | Decimal addition on FPGA based on a mixed BCD/excess-6 representation | Neto, Horácio; Véstias, Mário | article | |
| 2013 | Design of a Multiband Full-Rate Ultra-Wideband Receiver in FPGA | Véstias, Mário; Neto, Horácio; Sarmento, Helena | conferenceObject |  |
| Oct-2014 | Efficient Implementation Of A Single-Precision Floating-Point Arithmetic Unit on FPGA | José, Wilson; Silva, Ana Rita; Neto, Horácio; Véstias, Mário | article; conferenceObject | |
| 29-Mar-2019 | Exploring data size to run convolutional neural networks in low density FPGAs | Gonçalves, Ana; Peres, Tiago; Véstias, Mário | conferenceObject | |
| 29-Mar-2019 | Faster convolutional neural networks in low density FPGAs using block pruning | Peres, Tiago; Gonçalves, Ana; Véstias, Mário | conferenceObject | |
| 2012 | FPGA implementation of IEEE 802.15.3C receiver | Véstias, Mário; Sarmento, Helena | article; conferenceObject | |
| 2014 | FPGA-based architecture for hyperspectral endmember extraction | Rosário, João; Nascimento, José M. P.; Véstias, Mário | conferenceObject | |
| 2015 | FPGA-based architecture for hyperspectral unmixing | Nascimento, José M. P.; Véstias, Mário; Martin, Gabriel | conferenceObject | |
| 2012 | A high-rate mimo receiver in an FPGA | Pinho, Pedro; Véstias, Mário | article; conferenceObject | |
| 2018 | Hyperspectral compressive sensing - a low power consumption approach | Nascimento, Jose; Véstias, Mário; Duarte, Rui | conferenceObject | |
| 2018 | Hyperspectral compressive sensing - a low power consumption approach | Nascimento, Jose; Véstias, Mário; Duarte, Rui | conferenceObject | |
| 22-May-2018 | Improving the area of fast parallel decimal multipliers | Véstias, Mário; Neto, Horácio | article | |
| 5-Oct-2017 | K-means clustering on CGRA | Lopes, João D.; De Sousa, Jose; Neto, Horácio; Véstias, Mário | conferenceObject | |
| Aug-2018 | Lite-CNN: a high-performance architecture to execute CNNs in low density FPGAs | Véstias, Mário; Duarte, Rui; Sousa, José T. de; Neto, Horácio | conferenceObject | |
| 1-May-2019 | Low energy heterogeneous computing with multiple RISC-V and CGRA cores | Fiolhais, Luís; Gonçalves, Fernando; Duarte, Rui P.; Véstias, Mário; Sousa, José T. de | conferenceObject | |
| 2015 | A many-core co-processor for embedded parallel computing on FPGA | José, Wilson; Neto, Horácio; Véstias, Mário | conferenceObject | |
| Sep-2014 | A many-core overlay for high performance embedded computing on FPGAS | Véstias, Mário; Neto, Horácio | conferenceObject |  |
| 2005 | Metodologia de projecto de SoC configuráveis baseados em redes intra-chip | Véstias, Mário | conferenceObject | |
| 2016 | Multi-core for k-means clustering on FPGA | Canilho, José; Véstias, Mário; Neto, Horácio | article | |
