Miguens Matutino, PedroAraújo, JuvenalSousa, LeonelChaves, Ricardo2018-05-082018-05-082017MATUTINO, Pedro Miguens, [et al] – Pipelined FPGA coprocessor for elliptic curve cryptography based on residue number system. IEEE. ISBN 978-1-5386-3437-0. (2017), pp. 261-268.978-1-5386-3437-0http://hdl.handle.net/10400.21/8488In this paper a novel pipelined FPGA coprocessor for ECC is proposed, exploiting the parallelism capabilities of RNS to the computation of large operand algorithms. This intrinsic characteristic of representing large integer numbers as a set of smaller and independent values allows for the parallelization of the computationally heavy large operand multiplications, required in asymmetrical cryptographic algorithms. Towards a compact and performance efficient design, the RNS coprocessor supports a single highly pipelined multi-modulo arithmetic unit. Implementation results, on FPGA of this RNS based ECC coprocessor, suggest one of the smallest programmable designs with a proportional performance when compared with related state of the art. Additionally, the resulting architecture allows for the computation of varying key sizes without changing the design or its implementation.engFPGACoprocessorRNSjournal article