Fialho, Vitor2021-11-162021-11-162021-08FIALHO, Vítor – Integer N synthesizer design for LoRa transceivers. International Journal of Innovative Technology and Exploring Engineering (IJITEE). eISSN 2278-3075. Vol. 10, N.º 10 (2021), pp. 101-106http://hdl.handle.net/10400.21/14008This paper presents the study and design of an Integer N synthesizer model for three LoRa ISM bands: 430 MHz 868 MHz and 915 MHz. The proposed topology is composed by two voltage controlled oscillators working in two different bands. The presented model uses the same phase-frequency detector, charge pump and loop filter. This study is focused on dynamic and steady-state analysis in order to infer the synthesizer stability and bandwidth. The performed study shows that the settling time for all bands is less than 40 µs for a bandwidth of 102 kHz.engLoRaSettling timeSynthesizerTransceiverjournal article10.35940/ijitee.J9447.081010212278-3075